Portable electronic devices such as notebook computers, personal organizers, portable telecommunication equipment and other electronic devices consume much power during their display mode. By way of example, graphics control chips for laptop computers may be integrated circuits having synchronous dynamic ram (SDRAM) on the same die as the memory controller, other video and graphics processors, and central processing units if desired. For example, a conventional type of graphics control circuit may include a number of memory access request circuits (or access request engines) such as a video capture engine, a two dimensional and three dimensional drawing engine, a display engine, a video playback engine, a host processor, onboard SDRAM, SGRAM or other RAM serving as the frame buffer memory, a memory controller and a phase lock loop circuit (PLL) for generating a memory clock. As known in the art, each engine may have another clock, other than the memory clock, such as from another PLL or external clock, creating a clock boundary. Graphics control chips typically also include another phase lock loop circuit for generating a clock for a display device (or devices) such as a CRT that may plug into the laptop computer or an LCD display that is mounted to the laptop computer. A central processing unit (CPU) of the computer interfaces with the graphics chip and other peripheral devices as known in the art. A laptop computer or a portable device may include a TV tuner or video decoder, as part of a multimedia package, that sends video information to the video capture engine for eventual display on the LCD display after being stored in the memory.
With chips such as graphics controller chips, the many graphic engines 102 attempt to access the memory to perform their necessary operations. However only one of the graphic engines can typically access the memory at a given time. In addition, multiple memory controllers may be configured to access different portions of memory at the same time. Some of the display operations require real-time processing, such as video capture operation, display operation and video playback, so that real-time display can occur on the LCD display, or any suitable display device. For example, where the TV tuner is applying video to the video capture engine, the video should be processed in real-time to facilitate display in real-time which is necessary, for example, for live performances or when the TV tuner is providing live feed. Hence this engine has a higher priority over, for example, a 2D or 3D drawing engine which may be slightly delayed and still provide the user with high performance on display times.
A problem arises with such devices since power consumption and thermal dissipation needs to be minimized for portable devices without unnecessarily sacrificing operational performance. Also, the same problem arises for non-portable devices due to increased circuit density and increased clock speeds. The power dissipation of a graphics controller chip and other integrated circuits are typically related to the operational activity of memory. Conventional portable display systems typically have power management systems that generate system level standby/suspend commands. During system level standby/suspend modes, graphics controller subsystems and other subsystems may typically respond by forcing the frame buffer memory into a low power self refresh mode for the duration of the system level standby/suspend mode. This may be done for example by pulling a memory clock enable line low and other suitable pins to put the memory in a self refresh mode. The synchronous memories are designed to switch into energy savings modes based on the level of the memory clock enable signal. In addition, the memory clocks, engine clocks, register clocks and other clocks are also disabled during suspend mode to save energy.
FIG. 1 shows, by way of example, a block diagram of a portable display system used in devices such as a laptop computer, a handheld processing device, telecommunication device or any other suitable portable display device, that generates graphics and/or video display information to a display device and employs system level standby/suspend power management control. When the display system is a laptop computer, such systems typically include an operating system 10 that operates under, control of a central processing unit, for example, and a power management control system 12 which then generates a suspend/standby command 14 to a memory controller 16. The memory controller 16 then generates a clock enable/disable signal 18 to, for example, control a memory clock enable pin (and/or other pins) on a graphics memory device 20 to put the synchronous memory in a self refresh mode during the system level standby/suspend mode (e.g., the inactive mode). The graphics memory device 20 may be, for example, an SDRAM, SGRAM or any other suitable graphics and/or video memory device. The operating system 10 generates a suspend/standby command 22 when, for example, the laptop computer is in a standby/suspend mode as activated through a graphic user interface, software controlled timer, switch or other trigger event. Accordingly, such systems can reduce the power of the graphic subsystem which includes the synchronous memories used for frame buffer operations. A clock enable signal 18 is typically the memory clock enable 10 on the memory device 20. This control typically only puts the SGRAM or memory device in a low power mode when the graphic system is completely idle and turns off the memory clock and other clocks during the suspend mode. When the operating system 10 indicates that the display is in the active mode (e.g., the display is enabled), the memories are typically always enabled and the memory clock is always running.
However, such systems do not typically provide suitable power reduction during the active operational mode of the system since the memory clock is always running regardless of which circuits may be idle during the active mode. For example, various memory request engines 24a-24n, although in the active mode, may not be generating memory requests to memory controller 16.
In addition, many circuits employing memory controllers such as graphics accelerator circuits and video processing circuits may also use memory read data latching flops which latch data read from memory. Such latching circuits may include, for example, a plurality of flops designed to latch read data from memory based on a memory access request. Also typically, the latches are controlled by a memory clock circuit and if desired, an additional clock circuit to compensate for delays including circuit board line delays so that read data is not inadvertently skewed to the wrong clock cycle when read out from memory. These flops are typically always active. For example, the clock to the groups of flops are constantly running. During non-read cycles, undesired data is fed through the read path of the chip consuming power and potentially adding additional switching noise.
Graphics processing circuits are also known to stop the engine clock and/or register clocks during suspend and standby modes. This typically prevents access to registers for the graphics processing circuits. Other graphics processing circuits are known which have activity-based power reduction by turning off, for example, a graphic user interface clock to a GUI generating engine and a three dimensional rendering engine clock to 3D engine when the 3D engine is not being used. This is typically done because the 3D engine, when operational, can consume large amounts of processing capability of the graphics processing circuitry. As such, branches from a common engine clock are selectively turned off based on an activity level. However, it is typically done for only the larger processing engines. In addition, where the engines utilize more than one clock, only one clock, such as an engine clock, is controlled. The memory clock in such engines is typically allowed to continue to operate during the active mode.
Consequently, there exists a need for a dynamic power reduction circuit that can reduce power consumption and power dissipation without unnecessarily degrading system performance during active system modes. It would be advantageous, if such a system could detect memory access demand and automatically adjust memory operation accordingly to facilitate power reduction.